Search - vhdl fir

[VHDL-FPGA-Verilog] fir_hdl

Description: 一个 FIR 滤波器的 verilog 实现，与 matlab 产生的 reference code 相互验证。-Verilog a FIR filter to achieve, with the reference code generated by matlab mutual authentication.
Platform: | Size: 97280 | Author: wei | Hits:

[VHDL-FPGA-Verilog] MyFilter

Description: FPGA实现数字滤波器，用VHDL语言实现的直接1型FIR滤波器，具有较好的参考价值。-FPGA realization of digital filters using VHDL language to achieve the direct FIR filter type 1, has a good reference value.
Platform: | Size: 2048 | Author: 胡佳 | Hits:

[VHDL-FPGA-Verilog] reload_fir

Description: 这是我在Xilinx公司的FPGA上实现的FIR滤波器，调用的内部核，其特色是可以用较少的资源实现该功能，而且可以实现参数重载，即从外部MCU设置FIR滤波器的参数-This is my Xilinx FPGA to achieve the FIR filter, called internal audit, its characteristics can be achieved with fewer resources to this function, and the overload parameters can be achieved, that is, from an external MCU to set the parameters of FIR Filter
Platform: | Size: 16727040 | Author: 林寒风 | Hits:

[VHDL-FPGA-Verilog] FIR

Description: FIR of 1024 stage. 面向alteraFPGA器件设计-FIR of 1024 stage
Platform: | Size: 157696 | Author: 佴立峰 | Hits:

[VHDL-FPGA-Verilog] fir-c2h

Description: 基于fpga的fir滤波器的设计非常好，谢谢大家分享-fir filter design base on fpga it is very good
Platform: | Size: 11264 | Author: gary | Hits:

[VHDL-FPGA-Verilog] fir1

Description: this file consists of simple FIR filter designed with the fixed coefficients
Platform: | Size: 1024 | Author: bharat kumar | Hits:

[VHDL-FPGA-Verilog] fir

Description: Verilog编的fir滤波器，可以自己输入参数序列，产生滤波波形-Verilog compiled fir filter, input parameters can be their own sequence, resulting in filtered waveforms
Platform: | Size: 1024 | Author: lifei | Hits:

[VHDL-FPGA-Verilog] FIR_VHDL

Description: filtre fir a 3 coefficient (tous les bloc et les processeur elementaires
Platform: | Size: 123904 | Author: khaled | Hits:

[VHDL-FPGA-Verilog] LAB31

Description: EDA基础_综合实验篇__实验三十一 FIR数字滤波器设计-The basis of comprehensive experimental articles EDA __ _ experimental FIR digital filter design 31
Platform: | Size: 2915328 | Author: wonder | Hits:

[Documents] VHDL-FIRfilter

Description: 利用vhdl实现fir低通滤波器的设计，并且使用了MATLAB，很好很强大。-VHDL MATLAB fir lowpass filter
Platform: | Size: 29696 | Author: 邵娜 | Hits:

[Other] fir

Description: 是一个fir滤波器其中使用了MAC单元去实现累加和乘法运算。-A fir filter which uses the MAC unit to achieve accumulation and multiplication.
Platform: | Size: 1024 | Author: 张晓东 | Hits:

[VHDL-FPGA-Verilog] firlvboqi

Description: fir滤波器设计，是MATLAB设计的vhdl转换-VHDL fir digital filter design, MATLAB-based design of the conversion
Platform: | Size: 3072 | Author: 赵童 | Hits:

[source in ebook] eda

Description: 利用vhdl设计fir滤波器，有完整程序，包含加法器，乘法器。-Design using vhdl fir filter, a complete program, including adders, multipliers.
Platform: | Size: 186368 | Author: 黄林 | Hits:

[VHDL-FPGA-Verilog] 32jie-vhdl-fir

Description: 32阶数字滤波器没有时间来得及精简不好意思了的说呵呵 -32-order digital filter is not time enough time to streamline embarrassed to say Oh
Platform: | Size: 2048 | Author: 哈飞 | Hits:

[VHDL-FPGA-Verilog] FIR

Description: 实现FIR滤波，利用Verilog语言对其进行了设计 -FIR filter implementation using Verilog language design was carried out
Platform: | Size: 4126720 | Author: 翁萍 | Hits:

[VHDL-FPGA-Verilog] 32fir

Description: 32阶滤波器分布式算法实现的主程序代码,用EP2c35f84c8寄存器速率可达243.55MHz-32-order FIR digital filters: 32 filters distributed algorithm order the main program code, register with EP2c35f84c8 rate up to 243.55MHz
Platform: | Size: 2048 | Author: guoguo | Hits:

[VHDL-FPGA-Verilog] FPGAdesignandFIRimplementation

Description: 文档中含有DDS的VHDL实现，FIR滤波器串并FPGA实现，synplify,ISE,ModelSim后仿真流程和FPGA设计的资料-document contains DDS implementation with VHDL , FIR filter serial to parallel and FPGA implementation, and synplify, ISE, ModelSim simulation and FPGA design
Platform: | Size: 1383424 | Author: francis davis | Hits:

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[VHDL-FPGA-Verilog] fir_hdl

[VHDL-FPGA-Verilog] MyFilter

[VHDL-FPGA-Verilog] reload_fir

[VHDL-FPGA-Verilog] FIR

[VHDL-FPGA-Verilog] fir-c2h

[VHDL-FPGA-Verilog] fir1

[VHDL-FPGA-Verilog] fir

[VHDL-FPGA-Verilog] FIR_VHDL

[VHDL-FPGA-Verilog] LAB31

[Documents] VHDL-FIRfilter

[Other] fir

[VHDL-FPGA-Verilog] firlvboqi

[source in ebook] eda

[VHDL-FPGA-Verilog] 32jie-vhdl-fir

[VHDL-FPGA-Verilog] FIR

[VHDL-FPGA-Verilog] 32fir

[VHDL-FPGA-Verilog] FPGAdesignandFIRimplementation

[VHDL-FPGA-Verilog] FIR-lv-bo-code

[VHDL-FPGA-Verilog] fir

[VHDL-FPGA-Verilog] VHDL_TipsTricks

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